1. Field of the Invention
This invention is related to a semiconductor device having a self-repairing function.
2. Description of Related Art
Semiconductor devices, such as LSI devices, are often built with a self-repairing function, referred to as BISR (Built-In Self Repair). BISR repairs a defective part, improving the yield of semiconductor devices, by replacing the defective part with a redundancy circuit when the defective portion is detected in the semiconductor device by a self test function, BIST (Built-In Self Testing).
The function of BISR is explained herein with reference to a memory chip. BISR involves BIST, and the function of self-repairing is described in the following description.
FIG. 1 is a block diagram of a column cell array connected with a memory cell array in a memory chip. Each column cell in the column cell array is arranged corresponding to each memory cell in the memory cell array (not illustrated). Column cells A through D are shown in FIG. 1. Each column cell comprises a column selector (Column Sel) 101, a sense amplifier (S/A) 102, a multiplexer (MUX) 103, a BIST/BISR circuit (BIST/BISR) 104, a fuse (Fuse) 105, an addition circuit (Add.) 106, and an AND circuit 107. A redundancy column cell R, which replaces a defective portion, is also connected to the column cell array.
In the event BIST/BISR circuit 104 detects column cell B to be a defective part, fuse 105 of column cell B is blown out and MUX 103 of column cell B selects an output of S/A 102, in column cell C, by inputting a signal (sel) outputted by AND circuit 107 in column cell B. Similarly, the MUX 103 of column cell C selects an output of S/A 102 from column cell D by inputting a signal (sel) outputted by AND circuit 107 in column cell C. The MUX 103 of column cell D selects an output of S/A 102 of the redundancy column cell R by inputting a signal (sel) outputted by AND circuit 107 of column cell D. By switching the output of a defective column cell to the output of a neighboring column cell and then shifting in order, column cells A-D can operate properly.
Typically, as in the above example, testing is performed within a startup environment. However, such an environment is different from the actual operation environment. In an actual operation environment, operating voltage and threshold voltage fluctuate due to changing temperature of the semiconductor device or power source condition. In this way, the conditions in actual operation are much different from the conditions in the manufacturing process. Therefore, since testing is not performed under actual operation conditions, the reliability of the semiconductor device may be decreased.
Accordingly, an object of this invention is to provide a novel semiconductor device, having a wide operation range, capable of assuring its operation under fluctuations occurring in an actual operation environment.
The present invention includes an internal circuit to be tested, a redundancy circuit used when repairing a defective part in the internal circuit, a switching unit connected to the internal circuit and the redundancy circuit, wherein the switching unit switches wiring in order to ensure proper operation of the semiconductor, a test unit connected to the internal circuit, wherein the test unit performs testing for the internal circuit, and an operation environment change unit connected to the internal circuit, wherein the operation environment change unit changes environment of the internal circuit when the test unit performs testing.
According to principles of the present invention, semiconductor devices can be tested under the actual environment so that a defective part can be repaired under the actual operation environment. Moreover, it is possible to widen the range of guaranteed operation of semiconductor devices when a plurality of tests are performed under a plurality of operation environments. For example, tests can be performed under the condition that the semiconductor generates heat, like in the actual operation environment, if the tests are performed under a plurality of voltages.